(1)如果工程直接復(fù)制另一個工程,路徑一定要修改,建議重新eclipse工程。
(2)clean Project時提示rm: can't remove 'build/dhrystone.elf': Permission denied
正在使得該elf文件,上次的JTAG鏈接沒有斷開。此時可以先關(guān)閉c/c++工作界面,再重新添加C/C++(default),然后在Console中關(guān)閉上次的鏈接。
(3)Debug session'default' already started。
先關(guān)閉c/c++工作界面,再重新添加C/C++(default),然后在Console中關(guān)閉上次的鏈接。
(3)Memory region Used Size Region Size %age Used
c:/efinity/sdk_windows/riscv-xpack-toolchain_8.3.0-2.3_windows/bin/../lib/gcc/riscv-none-embed/8.3.0/../../../../riscv-none-embed/bin/ld.exe: build/ti60f225_oob.elf section `.bss' will not fit in region `ram'
ram: 2363296 B 1 MB 225.38%
c:/efinity/sdk_windows/riscv-xpack-toolchain_8.3.0-2.3_windows/bin/../lib/gcc/riscv-none-embed/8.3.0/../../../../riscv-none-embed/bin/ld.exe: region `ram' overflowed by 1314720 bytes
collect2.exe: error: ld returned 1 exit status
make: *** [../common/standalone.mk build/ti60f225_oob.elf] Error 1
解決辦法:Error的意思是外部存儲器的存儲空間不夠,目前在分配了1MB的情況下使用了225.38%。所以把default.ld中的LENGTH 修改成4M.
重新編譯后的結(jié)果。
(4)Error: libusb_get_string_descriptor_ascii() failed with LIBUSB_ERROR_PIPE
Error: no device found
Error: unable to open ftdi device with vid 0403, pid 6014, description 'ELITES-232DL', serial '*' at bus location '*'
原因:把embedded_swsoc_xxbspefinixEfxSapphireSocopenocdftdi.cfg(ftdi_ti.cfg)修改成下載器讀出來的名字,比如這里我把ELTES-232DL修改成了Trion T120F324 Development Board。因為Programmer界面讀到的USB target就是Trion T120F324 Development Board,當(dāng)然也要注意ftdi_vid_pid和ftdi_channel是否正確,如果不正確也會引起別的問題。
(5)Error:cpuConfigFileD:testriscvefx_ti60f225_oob_v2.1embedded_swsapphire_soccpu0.yaml not found
Error: target 'fpga_spinal.cpu0' init failed
原因:debuger路徑問題。在riscv和efx之間應(yīng)該有個斜杠,如報錯中的紅色標(biāo)注。
(6)No source available for "main() at 0x1114"
原因:沒有打開debug環(huán)境變量。打開debug開關(guān)之后要重新編譯。
(7)Error: timed out while waiting for target halted
原因:1)IP設(shè)置的是soft Jtag,實際卻用hard Jtag在調(diào)試;
2)CPU沒有跑起來;
3)debuger與JTAG沖突;
4)在interface 添加JTAG之后生成的信號與RISCV 連接不正確或者不完全。
5)AXI接口連接異常,也可能出現(xiàn)timed out指示。
(8)SOC燒寫到flash啟動不了
一般默認片上RAM選擇了4K大小用于bootloader,但是如果手動修改了bootloader,比如添加了debug,可能存儲空間不足。
(9)
Error:JTAG scan chain interrogation failed :all ones
Error: CheckJTAGinterface,timings,target power, etc.
Error: Trying to use configured scan chain anyway...
Error: fpga_spinal.bridge: IR capture error:saw ox0f not 0x01
workround:JTAG下載線連接不緊。
(10)soft Jtag與hard Jtag同時使用時,會出現(xiàn)第一次debug都需要重新插拔下載器問題
workround:查找兩個下載線的連接位置,注意分開兩個下載器的連接位置。
(10)soc IP生成不了,
workround可能是java 8沒有安裝
(11) No source available for "(gdbi2),proc[42000j,threadGroupi1],gdb(2),proc420001.0Sthread[1).thread(1j.framel0j'
說明:外部存儲器沒有運行起來
(12)錯誤:
mkdir: can't create directory 'build/xxx/embedded_sw/sapphire_soc/software/standalone/uartInterruptDemo/': No such file or directory
make: *** [../common/standalone.mk build/xxx/embedded_sw/sapphire_soc/software/standalone/uartInterruptDemo/src/main.o] Error 1
"make all" terminated with exit code 2. Build might be incomplete.
WorkWround : Eclipse路徑太長。
在common文件夾下,找到standalone.mk文件。
把路徑:
OBJS := $(realpath $(OBJS))
修改成:
OBJS := $(addprefix $(PROJ_NAME)/,$(OBJS))
如下圖所示(感謝客戶為我們提供解決方案)
(13)Debug時出Break at address"0xf90000000" with no debug information avalibale,oroutside of program code
(14)
Info : JTAG tap: fpga_spinal.bridge tap/device found: 0x10660a79 (mfg: 0x53c (Efinix Inc), part: 0x0660, ver: 0x1)
Error: fpga_spinal.bridge: IR capture error; saw 0x05 not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: !!!
Error: Can't communicate with the CPU
Error: !!!
Warn : target fpga_spinal.cpu0 examination failed
Info : starting gdb server for fpga_spinal.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Warn : Target was in unknown state when halt was requested
Info : Halt timed out, wake up GDB.
Error: timed out while waiting for target halted
原因(1)RISCV中FPGA Top Port選擇不對。
(2)確認下載線連接是否正常。
(13)
(1) 同一個下載器時softjtag與hardjtag的名字不能一樣,比如一個是YLS_DL,另一個是YLS_DL1.也就是需要手動把另一個名字修改下。
(2)注意修改cfg文件時文件時的channel號要與下載器對應(yīng)
(14)
(1)用2022的版本打開 2023版本的工程報這個錯誤 ,新版本已經(jīng)不再使用c232hm_ddhsl.cfg文件,而是改用external.cfg文件 。
(15)[BUILDER_INVOKE_BUILD_COMMAND]stderr找不到或無法加載主類saxon.board.efinix.EfxSapphireSocBUILDER INVOKE BUILD COMMAND-DONE] Build Command Execution: FailureIPGenerateFilesetException: [GENERATE _IP-ERROR] Build script failed in build command, 錯誤找不到或無法加載主類 saxon. board. efinix.EfxSapphireSoc
(1)重新安裝Efinity,可能某些文件丟失。
(16)Traceback (most recent call last):
File "F:/efinity/scripts/efx_run_pt.py", line 59, in
File "F:/efinity/pt/binlengine.py",line 24,in
ImportError: DLL load failed while importing Qtwidgets: 找不到指定的模塊
周四月22 24 1117- E:/efinity/python38/bin/python.exe finished. Exit code = 1 Exit st.
ERROR: Interface Designer constraint generation was not successful, will not proceed to efx_pnr...
Running placement and routing flow fail, See exit code and exit status.
說明:需要安裝VC
(17)RISCV IP生成報錯
[BUILDER_INVOKE_BUILD_COMMAND] stderr: Traceback (most recent call last): File "C:Efinity2023.2ipmip/efx_soc/efx_soc/embedded_sw/sw_script.py", line 677, in main() File "C:Efinity2023.2ipmip/efx_soc/efx_soc/embedded_sw/sw_script.py", line 121, in main shutil.copytree(Path(src_dir, f), dst=Path(loc, f), dirs_exist_ok=True) File "C:Efinity2023.2python311Libshutil.py", line 561, in copytree return _copytree(entries=entries, src=src, dst=dst, symlinks=symlinks, ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "C:Efinity2023.2python311Libshutil.py", line 515, in _copytree raise Error(errors) shutil.Error: [('C:\Efinity\2023.2\ipm\ip\efx_soc\efx_soc\embedded_sw\software\freeRTOS\freertosUartInterruptDemo\src\freertos_risc_v_chip_specific_extensions.h',
.......
[BUILDER_INVOKE_BUILD_COMMAND-DONE] Build Command Execution: Failure
IPGenerateFilesetException: [GENERATE_IP-ERROR] Build script failed in build_command, Traceback (most recent call last): File "C:Efinity2023.2ipmip/efx_soc/efx_soc/embedded_sw/sw_script.py", line 677, in main() File "C:Efinity2023.2ipmip/efx_soc/efx_soc/embedded_sw/sw_script.py", line 121, in main shutil.copytree(Path(src_dir, f), dst=Path(loc, f), dirs_exist_ok=True) File "C:Efinity2023.2python311Libshutil.py", line 561, in copytree return _copytree(entries=entries, src=src, dst=dst, symlinks=symlinks, ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File
說明:可能是工程的路徑太深。
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