面向IEEE 802.16e 中 LDPC 碼，分析了各種譯碼算法的譯碼性能，歸一化最小（NMS）算法具備較高譯碼性能和實現(xiàn)復雜度低的特點。提出一種基于部分并行方式的LDPC 譯碼器結構，可以滿足IEEE802.16e 中非規(guī)則LDPC 碼的譯碼要求。在FPGA 上實現(xiàn)了該譯碼器，數(shù)據(jù)吞吐率可以達到130 Mb/s。
關鍵詞：WiMAX，IEEE 802.16e，LDPC 譯碼器，部分并行，F(xiàn)PGA
Abstract: In this paper, the decoding performance of decoding algorithms is analyzed for Low
Density Parity Check (LDPC) code of IEEE 802.16e. Normalized Min-Sum(NMS) algorithm
possesses high decoding performance and low complexity. A LDPC decoding architecture based on partially parallel mode is proposed, which can satisfy the demand of irregular LDPC code for IEEE 802.16e. The decoder has been implemented on FPGA，and data throughput reaches 130 Mb/s.
Key Words: WiMAX, IEEE 802.16e, LDPC decoder, partially parallel, FPGA