Intel公司的Cyclone 10 LP FPGA系列是低成本和低靜態(tài)功耗的器件,提供高密度可編門,板上資源和通用I/O,邏輯單元(LE)采用四輸入查找表(LUT)和寄存器,嵌入乘法器區(qū)塊包括一個(gè)18x18或兩個(gè)9x9乘法器模式,以及用于算法加速的DSP IP,非常適合量大和低成本的智能和終端連接應(yīng)用如工業(yè)和汽車電子,廣播,有線和無線通信,計(jì)算和存儲(chǔ),醫(yī)療電子,消費(fèi)類電子和智能能源,軍用和航空航天.本文介紹了Cyclone 10 LP FPGA系列主要特性,LE框圖,器件架構(gòu)圖以及Intel Cyclone 10 LP FPGA評(píng)估板主要特性,框圖,電路圖,材料清單和PCB裝配圖.

　　The Intel? Cyclone? 10 LP FPGAs are optimized for low cost and low static power，making them ideal for high-volume and cost-sensitive applications.

　　Cyclone 10 LP devices provide a high density sea of programmable gates， on-board resources， and general purpose I/Os. These resources satisfies the requirements of I/O expansion and chip-to-chip interfacing. The Cyclone 10 LP architecture suits smart and connected end applications across many market segments：

　　? Industrial and automotive

　　? Broadcast， wireline， and wireless

　　? Compute and storage

　　? Government， military， and aerospace

　　? Medical， consumer， and smart energy

　　Cyclone 10 LP FPGA系列主要特性：

圖1.Cyclone 10 LP FPGA系列LE框圖

圖2.Cyclone 10 LP FPGA系列架構(gòu)圖

The logic and routing core fabric sea of gates is surrounded on each side by I/O elements, with a phase-locked loop (PLLs) in each corner. Embedded memory blocks (M9K) and 18 x 18 bit multipliers blocks are arranged in vertical columns.

The architecture also includes highly efficient interconnect and low-skew clock networks, providing connectivity between logic structures for clock and data signals.

Cyclone 10 LP FPGA系列應(yīng)用:

Intel Cyclone 10 LP FPGAs are ideal for cost-sensitive applications that require increasing lower static power as the need for scalable processing acceleration increases system interface requirements.
Typical end market examples include:
I/O expansion
Interfacing
Bridging
Sensor fusion
Industrial motor control

Intel Cyclone 10 LP FPGA評(píng)估板

The Intel? Cyclone? 10 LP Evaluation Kit provides an easy-to-use platform for evaluating the performance and features of the Intel Cyclone 10 LP FPGA device.The evaluation kit includes a RoHS and CE compliant Intel Cyclone 10 LP FPGA Evaluation Board with the following components.

圖3.Intel Cyclone 10 LP FPGA評(píng)估板外形圖

Intel Cyclone 10 LP FPGA評(píng)估板特性器件:

? Intel Cyclone 10 LP FPGA (10CL025, U256 package)
? Enpirion? EN5329QI/EN5339QI - 2A/3A PowerSoC Low Profile Synchronous Buck
DC-DC Converter with Integrated Inductor
? Enpirion EP5358xUI 600 mA PowerSoC DC-DC Step-Down Converters with
Integrated Inductor
? Intel XWAY PHY11G Gigabit Ethernet PHY PEF7071
? Intel MAX? 10 FPGA 10M08SAU169C8G (Embedded Intel FPGA Download Cable II
and System Management)
Programming and Configuration
? Embedded Intel FPGA Download Cable II (JTAG)
? Optional JTAG direct via 10-pin header
? Active Serial x1 configuration from EPCQ flash
Memory Devices
? 128 Mb 8-bit HyperRAM with HBMC (Hyperbus Memory Controller) IP provided by
Synaptic Labs
? 64 Mb EPCQ Flash
Communication Ports
? One Gigabit Ethernet (GbE) RJ-45 port
? One 2x20 GPIO Expansion Header
? One Arduino UNO R3 type connectors
? One 12-pin DigilentPmod compatible connector
Clock Circuits
? Silicon Labs Si510 50 MHz crystal oscillator
? Silicon Labs Si5351 clock generator with programmable frequency GUI
Power Supply
? USB Y-cable (USB Type-A to mini Type-B) for both on-board Intel FPGA Download
Cable II and 5V power supply from USB port
? Supplemental 5V DC power adaptor option (5V power adaptor and cord are not
included in the kit)
Intel Quartus? Prime Standard Edition / Lite Edition
Intel Quartus? Prime Standard Edition / Lite Edition software can be downloaded from
the Download Center at the Intel FPGA website.
Recommended Operating Conditions
? Recommended ambient operating temperature range: 0C to 45C
? Maximum VCCINT current: 0.6 A
? Maximum board power consumption: 3 A @ 5 V when powered by AC/DC adaptor

圖4.Intel Cyclone 10 LP FPGA評(píng)估板框圖

圖5.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(1)

圖6.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(2)

圖7.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(3)

圖8.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(4)

圖9.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(5)

圖10.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(6)

圖11.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(7)

圖12.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(8)

圖13.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(9)

圖14.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(10)

圖15.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(11)

圖16.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(12)

圖17.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(13)

圖18.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(14)

圖19.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(15)

圖20.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(16)

圖21.Intel Cyclone 10 LP FPGA評(píng)估板電路圖(17)

圖22.Intel Cyclone 10 LP FPGA評(píng)估板PCB裝配圖(正面)

圖23.Intel Cyclone 10 LP FPGA評(píng)估板PCB裝配圖(背面)